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Automotive Digital Design Engineer

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Join our team as an Experienced Digital Design Engineer in the Automotive Digital Interface Controller IP team. You will be responsible for specification development, architecture design, and RTL development of Automotive specific features. Work closely with the verification team and evaluate customer requirements related to quality, functional safety, and automotive reliability. Experience in protocols such as DDR, PCIe, and UCIe is a must. Proficiency in architecting, micro-architecture, and RTL coding is required. Come join us and explore the exciting world of automotive design!

Job Description and Requirements

We're looking for an Experienced Digital Design Engineer to join our Automotive Digital Interface Controller IP team.

The Automotive Digital Design Engineer is expected to:

  • Be responsible for specification development, architecture design and RTL development of Automotive specific features / enhancements.
  • Proactively develop safety mechanisms that can be embedded within our IP and reused easily
  • Work closely with the verification team and review verification plan mapping with the specification.
  • Work with product teams to evaluate customer requirements related to quality, functional safety, and automotive reliability.
  • Work closely with the Functional Safety and internal development teams on projects and task planning, progress tracking and reporting.

Key Qualifications

  • Must have BSEE in EE with 10+ years of relevant experience or MSEE with 9+ years of relevant experience.
  • Must have proven experience working on Automotive SoC’s / Digital IP’s.
  • Must have proven experience working of one or more of protocols at the IP level: DDR / PCIe / UCIe.
  • Hands on experience with architecting / micro-architecture / detailed design from functional specifications.
  • Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools.
  • Lint, CDC, synthesis flow and static timing flows, formal checking, etc experience.
  • Working knowledge / experience TCL, Perl, Python is added advantage.
  • Has a solid desire to learn and explore new technologies.
  • Performs in project leadership role & guides more junior peers with aspects of their job.
  • Frequently networks with senior internal and external personnel in own area of expertise.
  • Proficient in English.
  • Formal training in ISO 26262 is preferred.
  • Experience in qualifying systems with embedded hardware to various ISO 26262 ASIL levels up to ASIL D
  • Experience with various ISO 26262 work products such as DFMEA; FMEDA; DFA

 

Set alert for similar jobsAutomotive Digital Design Engineer role in Bangalore Urban, India
Synopsys Inc Logo

Company

Synopsys Inc

Job Posted

a year ago

Job Type

Full-time

WorkMode

On-site

Experience Level

8-12 Years

Category

Engineering

Locations

Bangalore Urban, Karnataka, India

Qualification

Bachelor or Master

Applicants

Be an early applicant

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Synopsys Inc Logo

Automotive Digital Design Engineer

Synopsys Inc

Bengaluru, Karnataka, India

Posted: a year ago

he Automotive Digital Design Engineer is expected to : Be responsible for specification development, architecture design and RTL development of Automotive specific features / enhancements. Proactively develop safety mechanisms that can be embedded within our IP and reused easily Work closely with the verification team and review verification plan mapping with the specification. Work with product teams to evaluate customer requirements related to quality, functional safety, and automotive reliability. Work closely with the Functional Safety and internal development teams on projects and task planning, progress tracking and reporting. Key Qualifications Must have BSEE in EE with 10+ years of relevant experience or MSEE with 9+ years of relevant experience. Must have proven experience working on Automotive SoC’s / Digital IP’s. Must have proven experience working of one or more of protocols at the IP level: DDR / PCIe / UCIe. Hands on experience with architecting / micro-architecture / detailed design from functional specifications. Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools. Lint, CDC, synthesis flow and static timing flows, formal checking, etc experience. Working knowledge / experience TCL, Perl, Python is added advantage. Has a solid desire to learn and explore new technologies. Performs in project leadership role & guides more junior peers with aspects of their job. Frequently networks with senior internal and external personnel in own area of expertise. Proficient in English. Formal training in ISO 26262 is preferred. Experience in qualifying systems with embedded hardware to various ISO 26262 ASIL levels up to ASIL D Experience with various ISO 26262 work products such as DFMEA; FMEDA; DFA