Job Description and Requirements
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. We’re looking for Application Engineer to join the team. Typically requires a minimum of 3-5+ years of related experience. Possesses a full understanding of specialization area plus working knowledge of multiple related areas. Unsupervised resolves a wide range of issues in creative ways on a regular basis. Customarily exercises judgment in selecting methods and techniques to obtain solutions. Performs in project leadership role. Contributes to complex aspects of a project. Creates and develops approach to solutions. Work is collaborative in nature. Provides regular updates to manager on project status. Represents the organization on business unit and/or company-wide projects. Guides more junior peers with aspects of their job. Frequently networks with senior internal and external personnel in own area of expertise. Provides technical and engineering insight and direction to support and improve usability, applicability and adoption of products, platforms and solutions to meet customer business needs. Diagnoses, troubleshoots and resolves complex technical issues on customer installations; deploys and trains customers on new implementations and capabilities. Reviews and understands feedback on product and solutions performance from customers and other application partners; works directly with Research and Development (R&D) to develop and implement technical roadmap, specifications and validation for improvements and enhancements. Partners with customer technical managers and Sales to identify business challenges, develop effective technical solutions for new accounts and increase utilization and retention of products on current accounts. Key Leveling Differentiators: Complexity and type of products/platform supported. Balance of technical and customer relationship management capability. Scope of responsibility and net impact of the role to the business Key Qualifications: Knowledge of RTL2GDS flow and methodology. Fundamental understanding of Synthesis and Place & Route engines, and how they interact with each other to deliver high quality QoR. Solid foundation in IC physical design flow, device physics, VLSI, UNIX, HDL (Verilog/VHDL) and/or CAD engineering. Knowledge of advanced node technologies (10nm, 7nm, 5nm) are required. Knowledge of timing corners/modes, process variations and signal integrity related issues are required. Solid foundation in IC physical design flow, device physics, VLSI, UNIX, HDL (Verilog/VHDL) and/or CAD engineering. Knowledge of circuits, logic design and a scripting language (e.g. Perl, Python or Tcl) are required. Ability to be proactive and have a strategic mindset in addition to having tactical problem-solving experience. Education Requirements: Ph.D./M.S. candidate in Computer Science, Electrical Engineering, Statistics or related field Preferred Experience: Working closely with the customer account team by actively participating and influencing the technical strategy and execution for the customer Work with R&D to improve the design flow, QoR and runtime of the design. Perform multiple what-if analyses using models to determine QoR sweet spot and present results. Support process includes diagnosing, troubleshooting, and providing workarounds for product bugs, and providing solutions for a wide range of complex issues covering usage, methodology, product defects, and interoperability. Drive all front end integration activities like Synthesis, UPF, ECO, etc. Perform block level place and route and close the design to meet timing, area and power constraints. Run Physical design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations to other designers. Assist in flow development for chip integration. Developing necessary artifacts or scripts that improve the overall job effectiveness and efficiency. |