The Job logo

What

Where

Sign in

Layout Design, Senior Engineer

ApplyJoin for More Updates

You must Sign In before continuing to the company website to apply.

Smart SummaryPowered by Roshi
Join as a Senior Engineer for Layout Design at Synopsys Inc in Hyderabad, Telangana, India. Collaborate with teams to develop analog and mixed-signal integrated circuit layout designs using EDA tools, ensuring design integrity and manufacturability. Stay updated with industry trends, contribute to design methodologies, and enhance best practices.

Job description 

Responsibilities:

  • Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits.
  • Create and optimize layout designs using industry-standard EDA tools.
  • Perform physical verification and design rule checks to ensure design integrity and manufacturability.
  • Participate in design reviews and provide feedback to improve design quality.
  • Work closely with circuit designers to understand design specifications and constraints.
  • Contribute to the development and enhancement of layout design methodologies and best practices.
  • Stay updated with the latest industry trends and advancements in A&MS layout design.


Required Skills:

  • Bachelor's or Master's degree in Electrical Engineering or a related field.
  • 2+ years of experience in A&MS layout design for integrated circuits.
  • Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler.
  • Exceptional knowledge of layout design methods, techniques, and methodologies.
  • Experience with physical verification tools, such as Calibre or Assura.
  • Understanding of semiconductor process technologies and their impact on layout design.
  • Excellent problem-solving and systematic skills.
  • Ability to work effectively in a team-oriented environment.
  • Good communication and interpersonal skills.
Set alert for similar jobsLayout Design, Senior Engineer role in Hyderabad, India
Synopsys Inc Logo

Company

Synopsys Inc

Job Posted

4 months ago

Job Type

Full-time

WorkMode

On-site

Experience Level

3-7 Years

Category

Engineering

Locations

Hyderabad, Telangana, India

Qualification

Bachelor or Master

Applicants

Be an early applicant

Related Jobs

Synopsys Inc Logo

Analog/Mixed-Signal Layout and Methodology Design Engineer

Synopsys Inc

Hyderabad, Telangana, India

Posted: 4 months ago

You will be designing layout automation scripts for custom analog and digital blocks in advanced technology nodes, focusing on multi-Gb/s SERDES IP. The role involves staying updated with IC design advancements and contributing to SerDes PHY layout for various protocols. Work with a dedicated team using cutting-edge IC design tools and custom in-house software.

Thermo Fisher Scientific Logo

Layout Engineer-PCB Design

Thermo Fisher Scientific

Hyderabad, Telangana, India

Posted: a year ago

About the Job: Ideal candidate will help bring ownership for a design de-risking of PCBA which may need refresh driven by aging design or supply chain issues. In the journey candidate will work closely with global sites to ensure that Change Management within this portfolio achieves a maturity. Will ensure right design metrics are followed. Role Purpose Summary: The Layout Engineer-PCB Design is the role that would closely work with Design Engineers on Multilayer & High- speed PCB Design, Schematic Drafting, Co-ordination activities. As an expert designer would also provide innovative & creative solutions to the team to deliver an optimized design layout. Roles & Responsibilities: As part of a multi-functional development team, major responsibility will include (not limited to) PCB Layout Design for PCBA Risk mitigation projects. Strong design experience of 8 plus years. Of which 3 to 4 years in PCB Manufacturing Decipher requirements and technical specification documents & seeks clarification where needed. Multilayer PCB Design with Rigid and with Rigid-flex. Footprint creation as per IPC standards. High-speed PCB Designs. High current Designs Schematic Symbol creation and drafting Bill of Material generation Crafting package for Fabrication. Cam350 experience. Tool Migration from one tool to another tool. Skills and Proficiencies: Tools: PADS (Mentor graphics), Pads Designer(DX Designer), ORCAD, Altium Schematic creation / Entry, Footprint (Library Creation & Management) Board outline and mechanicals, Importing Net list, Design Rule settings Component Placement, PCB Routing, Post processing and Gerber Settings Strong understanding of layout techniques for good Signal Integrity Can review & mentor for Design for Manufacturing & Design for Testability Sound knowledge in Gerber editing, CAM editing like Blind/ Buried/ Micro Vias & Impedance controlled PCB Design. Layout Design of Highspeed PCBs up to 16 layers. Good knowledge on component package Experience of working with design constraints for Hi-Speed digital and analogue routing Incorporate PCB modifications to existing product as requested primarily via engineering change orders. Good understanding of Electrical and Electronics Engineering fundamentals Aware & can navigate through design and simulation tools. Learns different tools and intent with hands-on experience Minimum Qualifications: Bachelor’s degree in Electrical / Electronic Engineering. Preferred Qualifications: Diploma or Bachelors in relevant engineering domain (EE) Knowledge of any Circuit design and Simulation tools. Desirable: Experience in Manufacturing Worked on time estimations

Thermo Fisher Scientific Logo

Layout Engineer-PCB Design

Thermo Fisher Scientific

Hyderabad, Telangana, India

Posted: 10 months ago

Roles & Responsibilities: As part of a multi-functional development team, major responsibility will include (not limited to) PCB Layout Design for PCBA Risk mitigation projects. Strong design experience of 8 plus years. Of which 3 to 4 years in PCB Manufacturing Decipher requirements and technical specification documents & seeks clarification where needed. Multilayer PCB Design with Rigid and with Rigid-flex. Footprint creation as per IPC standards. High-speed PCB Designs. High current Designs Schematic Symbol creation and drafting Bill of Material generation Crafting package for Fabrication. Cam350 experience. Tool Migration from one tool to another tool. Skills and Proficiencies: Tools: PADS (Mentor graphics), Pads Designer(DX Designer), ORCAD, Altium Schematic creation / Entry, Footprint (Library Creation & Management) Board outline and mechanicals, Importing Net list, Design Rule settings Component Placement, PCB Routing, Post processing and Gerber Settings Strong understanding of layout techniques for good Signal Integrity Can review & mentor for Design for Manufacturing & Design for Testability Sound knowledge in Gerber editing, CAM editing like Blind/ Buried/ Micro Vias & Impedance controlled PCB Design. Layout Design of Highspeed PCBs up to 16 layers. Good knowledge on component package Experience of working with design constraints for Hi-Speed digital and analogue routing Incorporate PCB modifications to existing product as requested primarily via engineering change orders. Good understanding of Electrical and Electronics Engineering fundamentals Aware & can navigate through design and simulation tools. Learns different tools and intent with hands-on experience Minimum Qualifications: Bachelor’s degree in Electrical / Electronic Engineering. Preferred Qualifications: Bachelors in relevant engineering domain (EE) Knowledge of any Circuit design and Simulation tools.

Micron Technology Logo

Senior Layout Engineer -DEG Layout

Micron Technology

Hyderabad, Telangana, India

Posted: a year ago

Design and develop critical analog, mixed-signal, and custom digital blocks for chip level integration support. Responsible for layout verification, quality check, and documentation. Demonstrate leadership skills in planning, estimation, scheduling, delegation, and execution. Guide junior team-members and contribute to effective project management. Excellent command and problem-solving skills in physical layout verification. Excellent verbal and written communication skills.

Synopsys Inc Logo

SOC Physical Design Engineer, Senior II

Synopsys Inc

Hyderabad, Telangana, India

Posted: a year ago

In this role, candidate will be part of the engineering teams implementing DDR, HBM and UCIE PHYs for customer ASICs and SOCs. The project scope includes RTL synthesis, Bump planning , physical design, physical verification, STA and Sign off. Candidate will contribute as a Senior Member of a design team, or as a Project Head working with both internal and external design teams. Ideal candidate for this role demonstrates excellent technical knowledge, sound communication skills, verbal and written, and awareness of project management issues. Keeps composure during crises and can comfortably handle risks and uncertainty. One has a sound desire to learn and explore new technologies. Demonstrates good investigation and problem-solving skills. Prior knowledge and experience with state-of-the-art CAD tools (ICC2, ICV) and technologies (FinFet) is required. Engineer exercises autonomous judgment in selecting methods and techniques to obtain solutions. Performs in project leadership role. Contributes to complex aspects of a project. Establishes and develops approach to solutions. Provides regular updates to manager on project status. Represents the organization on business unit and/or company-wide projects. Guides more junior peers with aspects of their job. One networks with senior internal and external personnel in own area of expertise Key Qualification Typically requires a minimum of 6+ years of related experience Full knowledge of specialization area plus working knowledge of multiple related areas like DFT, RTL , package design Ability to Autonomously resolves a wide range of issues in inventive ways on a regular basis. Prior knowledge and experience with state of the art CAD tools (DC, PT, ICC2, ICV) and technologies (FinFet) is required

Synopsys Inc Logo

Sr. I, R&D Engineer (HW RTL Design)

Synopsys Inc

Hyderabad, Telangana, India

Posted: a year ago

Job Descriptions & Requirements Part of the rapidly expanding Hardware-Analytics and Test (HAT) business unit, a Digital Hardware Sensor designer works on development of various Process, Voltage, Temperature, Structural, Droop and Performance monitors as part of HDG (Hardware Development Group) product portfolio. The Digital sensor designer will conceptualize new sensor products as well as understand existing products and enhance them for better performance, automation friendliness and ease of design. We are seeking an experienced, highly motivated, and high-caliber individual to build these differentiating digital sensor/controller products. This individual should have strong technical experience in digital frontend design, timing, post-silicon characterization, PVT and DFx domains. Additional responsibilities include: Work on sensor development projects in HDG-India Understand business priorities and break it down into technical tasks Understand existing products at lower levels and identify enhancement opportunities / cost Look ahead into future opportunities and help create a technical roadmap for the IP Deployment of new sensors into test chips and post-silicon characterization Job Requirements Architectural and forward-looking thought process Sound knowledge of Frontend Digital design and Backend implementation BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience Exposure to architecture, design or verification of PVT, Ring-Oscillator, Mixed-signal based IPs Expertise in areas of optimizing PPA (Performance, Power, Area) achieved pre-silicon and realized post-silicon, and improving execution schedules Demonstrated experience with multiple CAD flows: design, verification, backend, validation, etc. Excellent teamwork, communication and interpersonal skills with both internal teams and external customers Preferred skills : Strong RTL design and coding experience in Verilog, system Verilog, VHDL etc. Experience with micro architecture and design of digital IPs and subsystems Experience with light weight CPU or microcontroller designs and operation fundamentals Exposure to backend implementation and signoff in STA, P&R and RTL2GDS ASIC flows Demonstrated technical expertise in the productization of advanced technologies Experience with yield analysis to drive yield and quality/DPPM (Defective Part Per Million) improvements Knowledge of one or more AMBA protocols: APB, AXI etc. Experience in DFT/DFx technologies and concepts is a strong plus