Engineer - Physical Design & Verification

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Join as an Engineer in Physical Design & Verification at Seagate Technology in Pune, Maharashtra, India. Own complete physical design & verification flow for multiple blocks. Work on power planning, timing closure, signal integrity, and ECO generation. Interface with full chip physical design activities. Ideal candidate has hands-on experience in high-speed digital physical design, scripting skills, and problem-solving ability.

Job description

About the role - you will:

•   Work closely in the Design Implementation team for physical design, physical verification & power related activities across various SoCs
•   Own complete Physical Design & Physical Verification flow for multiple blocks
•   Work on Floor planning, power planning, P&R, CTS, timing closure, IR analysis, and formal equivalence for block level, full chip hierarchical, and flat designs
•   Own parasitic extraction, timing closure, signal integrity, and timing ECO generation/ implementation
•   Work on creating setup and scripts for DRC, LVS, Antenna, and density checks, report generation, analysis, debug, and implementing the fixes in the physical design database
•   Own complete IR/IVD & ESD analysis flow for multiple blocks and chip level
•   Work on Power mesh creation at various IPs (analog, digital Hardmacs, pad-ring) and full chip level
•   Work closely with full chip physical design activities like bumping and RDL routing
•   Interface with full chip level engineers for chip finishing tasks such as LVS, DRC, Antenna check, etc

About you:

•   Self-starter and self-motivated personality
•   Ability to work with ASIC teams and other integration team members
•   Capable of working with general instructions on routine work and detailed instruction on new projects
•   Shares knowledge with others and is keen to build expertise by working collaboratively with team members
•   Ability and willingness to work in a multi-cultural environment and across multiple timezones

Your experience includes:

•   Experience/exposure to high-speed digital physical design and physical verification including ASIC through semi-custom high-speed digital designs from PD through tape out
•   Hands-on experience on physical design / verification flow (floor planning, power planning, P&R, CTS, Timing closure, DRC, LVS). Exposure to EM, IR, low power design with UPF
•   Technology node: 7nm/ 12nm/ 16nm/ 28nm
•   Strong scripting skills using Tcl, PERL, and Make based flow
•   Strong problem solving and debugging skills
•   Good team player with strong verbal and written communication skills

Set alert for similar jobsEngineer - Physical Design & Verification role in Pune, India

Company

Seagate Technology

Job Posted

4 months ago

Job Type

Full-time

WorkMode

On-site

Experience Level

0-2 Years

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