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Staff Engineer, DEG Layout

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Design and develop critical analog, mixed-signal, and custom digital blocks. Demonstrate leadership in planning, scheduling, and execution. Guide junior team members. Communicate effectively with engineering teams. Must have 8+ years experience in analog/custom layout design, expertise in Cadence and Calibre, and good understanding of layout fundamentals. Excellent problem-solving and communication skills. BE or MTech in Electronic/VLSI Engineering.

Role and Responsibilities

  • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
  • Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
  • Responsible for on-time delivery of block-level layouts with acceptable quality.
  • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
  • Guide junior team-members in their execution of Sub block-level layouts & review their work
  • Contribute to effective project-management.
  • Effectively communicating with engineering teams in the US, Japan, and Germany to assure the success of the layout project.

 

Qualification/Requirements

  • 8 + year experience in analog/custom layout design in advanced CMOS process.
  • Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must.
  • Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
  • Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)
  • Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
  • Ability to understand design constraints and implement high-quality layouts.
  • Excellent command and problem-solving skills in over Physical layout verification.
  • Multiple Tape out support experience will be an added advantage.
  • Scripting and automation experience is good to have but not mandatory.
  • Excellent verbal and written communication skills.
  • Education: BE or MTech in Electronic/VLSI Engineering
Set alert for similar jobsStaff Engineer, DEG Layout role in Hyderabad, India
Micron Technology Logo

Company

Micron Technology

Job Posted

a year ago

Job Type

Full-time

WorkMode

On-site

Experience Level

8-12 Years

Category

Engineering

Locations

Hyderabad, Telangana, India

Qualification

Bachelor

Applicants

Be an early applicant

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Micron Technology Logo

Senior Engineer, DEG Layout

Micron Technology

Hyderabad, Telangana, India

Posted: a year ago

Design and develop critical analog, mixed-signal, custom digital blocks. Perform layout verification and quality check. Deliver block-level layouts with acceptable quality. Demonstrate leadership in planning and execution. Guide junior team-members. Communicate effectively with global engineering teams. 8-15 years of experience in analog layout design in advanced CMOS process required. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS. Knowledge of analog layout fundamentals and layout effects on the circuit. Excellent problem-solving skills and communication skills. BE or MTech in Electronic/VLSI Engineering.