Job description 

The Person: 

We are seeking a formal verification engineer with strong analytical skills that thrives in a face-paced environment.  A team player with a global mindset and ability to work in a multi – site environment are keys to being successful in this role.  

Key Responsibilities:  

When you join our verification team, you will contribute in many ways including these areas:

• Work with design team to create FV test plan.
• Build formal verification environment, write assertions, covers and appropriate constraints. 
• Create a common formal verification flow so properties and assertions can be ported to different hierarchies.
• Provide Training and mentor new team members.  

Preferred Experience:

• Experience with complex CPU/ASIC projects, with demonstrated mastery of successful verification from test planning till tapeout
• Hands on experience in writing SV assertions. 
• Exposure to formal methodologies and industry standard Formal tool (like VC Formal, Jasper..).
• Knowledge of scripting using Perl,tcl or equivalent.
• Cache coherency or industry standard AMBA protocol knowledge is a plus  

Academic Credentials:

• Degree in Electrical Engineering, Computer architecture, or Computer Science with a focus on computer architecture is preferred.
• Location: Bangalore 

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