Formal Verification
AMD
Bengaluru, Karnataka, India
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ As a member of the UMC Verification team, you are part of a dedicated team whose work has enabled AMD to put multiple SoCs to market in any given year. The UMC is part of every new AMD product being developed across Client, Server, Graphics and Semi-Custom markets. We are seeking an engineer to join the UMC team to help verify our growing product portfolio. In this role, you will analyze the scope of formal verification tasks and set priorities for the work. We have competitive benefit packages and an award-winning culture. This is your chance to be a part of this unique team - Join us! The Person: We are seeking a formal verification engineer with strong analytical skills that thrives in a face-paced environment. A team player with a global mindset and ability to work in a multi – site environment are keys to being successful in this role. Key Responsibilities: When you join our verification team, you will contribute in many ways including these areas: Work with design team to create FV test plan. Build formal verification environment, write assertions, covers and appropriate constraints. Create a common formal verification flow so properties and assertions can be ported to different hierarchies. Provide Training and mentor new team members. Preferred Experience: Experience with complex CPU/ASIC projects, with demonstrated mastery of successful verification from test planning till tapeout Hands on experience in writing SV assertions. Exposure to formal methodologies and industry standard Formal tool (like VC Formal, Jasper..). Knowledge of scripting using Perl,tcl or equivalent. Cache coherency or industry standard AMBA protocol knowledge is a plus Academic Credentials: Degree in Electrical Engineering, Computer architecture, or Computer Science with a focus on computer architecture is preferred.