Job description 

THE ROLE:

The SOC RTG team develops leading edge discrete graphics SOCs. The team owns SOC execution and is actively engaged from architecture to production. Working as part of the SOC leadership team, candidates will gain knowledge in system and IP level design, SOC architecture and implementation strategies.

THE PERSON:

• Must have good communication & analytical thinking skills
• Detail oriented with strong analytical and debugging skills
• Experience between 5 to 10 years.
   

KEY RESPONSIBILITIES:

• Integrate AMD internal IPs RTL/DV environments into SoC
• Debug function/performance of Graphics, Display, SMU IPs
• Engage with IP and SOC teams to drive closure to IP RTL deliverables.
• Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation
• Drive design and methodology improvements across teams to improve overall program execution

PREFERRED EXPERIENCE:

• Proficiency with Verilog/VHDL RTL design languages
• Knowledge of chip bus interfaces such as AHB, AXI and various standard peripherals & interfaces is required.
• ASIC DV experience in reusable verification methodology such as UVM
• Have hands-on experience in SOC Design/Integration activities, involving IPs, padring and pinmuxing.
• Have knowledge of SOC design specification, architecture and micro-architecture,
• ASIC, SOC, and IP Verification
• Hands on from Block level to Full Chip Functional Verification
• Coming up with feature extraction, verification, and progress plan
• Power Blocks Verification and Debugging

ACADEMIC CREDENTIALS:

• Bachelor or Masters Degree in Electrical Engineering, Computer Engineering or Computer Science.

#LI-SR4