Job description 

What you'll be doing:

Drive SOC execution working with all multi-functional teams to define, track and drive dependencies working closely with the SoC verification, DFT, STA, Low Power and Validation teams.

Drive SoC Assembly, SoC level quality checks, Connectivity reviews and signoff, SoC level Lint and CDC, Bug Triaging, Code reviews and ECOs.

Participate in silicon architecture, micro-architecture reviews, collaborate with Architecture, SW/FW, Design, Modeling, Verification, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right SoC design.

Collaborate with IP development teams, and participate in, and support soft and hard IP identification, selection and IP licensing.

Identify candidates, hire, and mentor SoC Design engineers, and as a team, identify problems and inefficiencies in the process and propose solutions.

What We Need To See:

Bachelor's or Master's degree or equivalent experience in Electronics and Communication Engineering or Electrical Engineering.

5+ years of hands on SoC Design experience, expertise in Verilog/System-Verilog, Knowledge of AMBA protocols - AXI, AHB, APB, SoC Clocks/RST/Debug architecture and sound understanding of peripherals ( USB, PCIE and SDCC)

Strong coding skills in Perl, Python, or other industry-standard scripting languages.

Experience in RTL Build flows and Makefiles, Synthesis is a plus.

Experience working with SoC level floorplan team is an added advantage.

Background in developing tools and infrastructure using Perl or Python.

Excellent analytical and problem-solving skills.

Experience working across multiple projects and prioritising in partnership with customers