What you'll be doing:

Verify Switch design's architecture and micro-architecture using advanced methodologies.

Build reference models, verify and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organisations such as Architecture, Micro- Architecture, and FW.

You are encouraged to understand the design and implementation, define the verification scope, develop the verification infrastructure, test plans and tests and verify the correctness of the design at SOC level.

Use sophisticated verification methodologies like e-specman, SV-UVM etc.

What we need to see:

BS (or equivalent experience) / MS with 2+ years of experience in design verification.

Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).

Perl/python scripting language experience desirable.

Ways to Stand out from the crowd:

Prior experience of Ethernet or Infiniband Switches, and/or smartNICs or DPUs, and/or high-speed interconnects.

Strong debugging, problem-solving and analytical skills.

Scripting knowledge (Python/Perl/shell).

Good social skills and ability & desire to work as an excellent teammate