What you’ll be doing:

Work on structural and functional verification of low power aspects of NVIDIA’s family of chips.

Come up with test plans and coverage plans of these features.

Write test cases, test bench components like assertions and coverage points, and own verification convergence.

Collaborate with system level and unit level teams to cover the features well from functional, electrical, performance, and noise aspects.

Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.

Validate the effectiveness of the low power features on silicon.

What we need to see:

BS/MS or equivalent experience with specialization related to Low Power techniques and Verification.

2+ years of experience.

Fundamental understanding of power basics including transistor-level leakage/dynamic characteristics of VLSI circuits.

Knowledge of power intent formats - UPF/CPF.

Experience in Static Power check - tools like VCLP/MVRC or similar.

Hands-on knowledge in Power aware dynamic verification - NLP/MVSIM or similar tools.

Experience in design and verification tools (VCS or equivalent simulation tools, Verdi or other debug tools).

Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS).