Senior IP Verification Engineer - GPU Interconnect
NVIDIA
Bengaluru, Karnataka, India
What you’ll be doing: Be responsible for verifying the ASIC design, architecture and micro-architecture of GPU Interconnect (built in-house) using advanced verification methodologies. Expected to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Develop test plans, tests and verification infrastructure for complex IPs/sub-systems. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Use advanced verification methodologies like SV/UVM. Perform functional coverage driven verification closure. You will be working with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B.Tech./ M.Tech. with 5+ years of relevant experience Experience in verification of complex IPs/units and sub-systems Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies Expertise in Verilog Knowledge in SystemVerilog or similar HVL Experience in verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways to stand out from the crowd: Experience in memory subsystem or network interconnect IP verification Good debugging and analytical skills Scripting knowledge (Python/Perl/shell) Good communication skills & dream to work as a great teammate