Job description 

This position requires a highly motivated and experienced person to work with Synopsys’ customers on integrating leading edge Interface IP (IIP) into their ASIC SoC/systems for next generation products utilizing our DDR/LPDDR4/4x/5. The position offers opportunities to work on Synopsys IIP and the latest industry specifications/applications on various hot market segments. The position will provide IIP integration guidance to customers throughout their SoC flow to resolve technical challenges, perform integration reviews at key milestones and support silicon/system bring-up. Some travels may be required

Key Qualifications:

• This position typically requires at least 2 to 3 years of related IP design or customer experience, but we may also consider candidates with less experience with the right academic background.
• ASIC design experience with proven design background.
• Experience in one or multiple steps on IP design or integration flow of ASIC / SoC design (such as simulation/verification, RTL synthesis, floor planning, physical design, timing closure, etc.) and silicon bring-up/characterization in a system environment.
• Domain knowledge of at least one of the following protocols:
• PCI Express
• SERDES
• Serial ATA
• Good RTL and Gate Level simulation Debug skills
• Familiarity with Front end implementation like Synthesis, Static Timing Analysis, Logical Equivalence Check

Preferred Experience

• Technical knowledge with any Interface IP such as PCIe, USB, SATA, MIPI, HBM DDR, LPDDR Protocols, Specification, Design, and Implementation flows with Design Compiler, Fusion Compiler and PrimeTrime.
• Excellent organization skills, excellent communication skills and ability to interact with customers
• Proven track record in meeting tight schedules and handling multiple projects concurrently