Job description 

Qualifications

Required:

• 8+ years of pre-silicon SOC, chip level, subsystem or IP verification experience
• Candidate must have at least a Bachelor’s or Master’s degree in Electrical, Computer Engineering, Computer Science or a related degree

Preferred:

• Demonstrated expertise in one or more of the following: fabrics, power management, reset, DDR controllers, coherency, virtualization, interrupts, security, clocking, RAS, PCIe, CXL, USB, protocol bridges or other complex SOC or IP flows and protocols
• Experience with verification for a full product cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff
• Experience creating, maintaining, or integrating test benches, checkers and stimulus using System Verilog Test Bench (SVTB), UVM and/or C
• Experience in automating verification processes using Python or another scripting language

Responsibilities

This high impact role on the team, you will have the opportunity to:

• Own verification of complex flows at the SOC, subsystem, or IP levels
• Learn about the design and interact with partner teams to define verification strategies and test plans
• Develop verification environments and run and debug simulations to drive quality
• Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
• Innovate to improve verification efficiency through methodologies or tools
• Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion