Job Description and Requirements
This role involves analyzing various mixed signal techniques for dynamic and static power reduction, performance enhancement and area reduction. You’d leverage your strong understanding of circuit simulation and circuit layout as well as knowledge of bipolar, CMOS, passive structure, and interconnect failure modes.
You will be part of a strong development team in the area of High Speed PHYSICAL Interface Development.
You will develop Analog Full custom circuit macros, i.e., PLL, Regulators, equalizers, Analog Front End, needed for High Speed PHY IP, in planer and fin-fet CMOS technology..
You will be working with experienced set of teams locally and in with people from various sites spread across globe.
Key Qualification:
BE+2 years of relevant experience / MTech+1 years of relevant experience in Electrical/Electronics/VLSI Engineering or other relevant field of study.
Technical Attributes
Mandatory:
Preferred: