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Intern

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We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a dedicated and detail-oriented Formal Verification Engineer with a passion for ensuring the reliability and functionality of complex design IPs. You excel in a collaborative environment, working closely with designers, architects, and verification engineers to drive verification projects to success. You possess a solid understanding of hardware micro-architecture and design, and you are proficient in HDLs like Verilog and SystemVerilog. Your problem-solving skills are top-notch, and you are familiar with formal property verification concepts and tools. You are eager to contribute to a team that is at the forefront of technological innovation and excellence.

What You’ll Be Doing:

  • Helping decide on the best applications of formal verification techniques to various parts of the design.
  • Reviewing functional and micro-architectural specifications to define the scope for formal verification.
  • Creating high-quality formal verification test plans to sign off on the corresponding design implementation.
  • Building formal verification testbenches, coding assertions and constraints, and applying abstraction techniques.
  • Applying formal coverage techniques to analyze over-constraints and measure functional coverage.
  • Collaborating closely with the Synopsys Tool Development Group to drive verification projects.

The Impact You Will Have:

  • Ensuring the reliability and functionality of complex design IPs through rigorous formal verification.
  • Contributing to the development of high-quality IP that meets the stringent requirements of our clients.
  • Driving innovation in verification methodologies and techniques.
  • Collaborating with a talented team to achieve project milestones and goals.
  • Enhancing the overall quality and performance of Synopsys' product offerings.
  • Playing a key role in the success of various high-profile projects within the company.

What You’ll Need:

  • Pursuing or completed BTech/MTech degree in Electrical Engineering, Computer Engineering, or a related field.
  • Good understanding of hardware micro-architecture and design.
  • Proficiency in HDLs like Verilog and SystemVerilog.
  • Familiarity with SystemVerilog Assertions (SVA) and basic concepts of formal property verification.
  • Good debugging and problem-solving skills.
  • Scripting knowledge (Python/Perl/shell).
  • Good interpersonal and communication skills and a dream to work as a great team member.

Who You Are:

  • An excellent communicator who can articulate complex ideas clearly and effectively.
  • A team player who thrives in a collaborative environment.
  • A detail-oriented individual with strong analytical and problem-solving skills.
  • A proactive learner who stays updated with the latest industry trends.
  • A highly motivated and driven professional with a passion for technology.
Set alert for similar jobsIntern role in Bengaluru, India
Synopsys Inc Logo

Company

Synopsys Inc

Job Posted

2 days ago

Job Type

Full-time

WorkMode

On-site

Experience Level

0-2 Years

Category

Software Engineering

Locations

Bengaluru, Karnataka, India

Qualification

Bachelor

Applicants

107 applicants

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